On August 31, DigiTimes said that Nvidia is currently stepping up its cooperation with TSMC on high-end chips. Nvidia is considering using TSMC’s SoIC technology for HPC chips, the sources said.
As Moore’s Law is about to face the physical limit, advanced packaging technologies including chiplets and heterogeneous integration are hot topics in the field of high-efficiency computing (HPC) chips, which have continued from the Hot Chips conference in late August 2022 to the present. …
According to public information, SOIC (Small Outline Integrated Circuit Package) is a small-outline integrated circuit package, which refers to a small-outline integrated circuit with no more than 28 outer leads. It is derived from SOP (Small Out-Line Package) package. The body and narrow body package forms are one of the surface mount integrated circuit package forms, which reduce the space by about 30-50% and the thickness by about 70% compared with the equivalent DIP package.
To put it simply, SoIC is an innovative multi-chip stacking technology from TSMC, which can perform wafer-level bonding technology for processes below 10nm. This technology has no protruding bonding structure, so it has better performance.
HPC designs typically use chiplets in various package types. MCMs are ideal for smaller, low-power designs. The 2.5D design is suitable for artificial intelligence (AI) workloads, as GPUs tightly coupled to HBM provide a powerful combination of computing power and memory capacity. With vertically stacked CPUs and fast memory access, 3D ICs are ideal for general HPC workloads.
The head of TSMC’s HPC business development said that TSMC expects that HPC will continue to be the strongest growth platform in the future at least until 2025. The HPC field defined by TSMC includes CPUs, GPUs, and AI accelerators.
In addition, the head of TSMC’s HPC business development not only reiterated that TSMC’s 5nm family mass production continued to be strong for the third year, but also shared that TSMC’s 5nm family extended N4X and N4P have won the favor of many customers, and said that TSMC’s 3nm family will be put into production in the second half of the year.
It is understood that in April this year, TSMC stated that its revenue contribution from HPC in Q1 this year reached 41%, surpassing mobile phones as the largest revenue source for the first time.
There is also news from the supply chain that Nvidia expects the annual growth of HPC chip performance to reach about 200-250%. If the progress is smooth, new products with a 5nm enhanced version can be launched at the earliest in the third quarter.